1. Field of the Invention
The present invention relates to a graphic controlling processor for a graphic display system.
2. Discussion of the Background
FIG. 1 is a block schematic diagram showing a general background graphic display system. The graphic display system includes a display apparatus 4, such as a CRT display or a LCD display, which displays a graphic image, a frame memory 3 storing graphic data for displaying the graphic image, a graphic controller 2 controlling the display apparatus 4 based on the graphic data and a central processing unit (CPU) 1 controlling the graphic controller 2. For the frame memory 3, a dual port RAM (for example, VRAM) or a single port RAM can be used. If a single port RAM is used, it is necessary that all three processing's of a data reading processing, a data writing processing and a data clear processing are completed in one frame cycle. The data writing processing functions to store the graphic data in the frame memory 3. The data reading processing functions to move the graphic data stored in the frame memory 3 to the display apparatus 4. The data clear processing functions to clear the graphic data stored in the frame memory 3 for a next data reading processing.
As shown in FIG. 2, as an example, the frame memory 3 may be divided into two territories (each territory is made of one frame of memory volume). The graphic data for displaying the graphic image is read out from one territory (for example, M0) of the frame memory 3 by one scanning line, then the graphic data is moved to an unillustrated line memory, then the graphic data is written into another territory (for example, M1) of the frame memory 3, and the data read out from the one territory (for example, M0) is then cleared. In the background device all of these processes need to be finished in one frame cycle. In a next frame cycle, graphic data for displaying a graphic image is read out from the other territory (for example, M1), and then the next graphic data is written into the one territory (for example, M0).
FIG. 3 shows a display period and a blanking period B in a frame cycle. FIG. 4 shows a data reading processing time R, a data writing processing time W and a data clear processing time C, for FIG. 3. The sum of the data reading processing time and the data writing processing is a time for displaying the graphic image. For graphic quality, a large enough time for displaying the graphic image is needed. However, the time for displaying the graphic image is reduced by the data clear processing time C.